Neurealm provided end-to-end digital verification services for a Cortex-M3 based IoT gateway IC, successfully achieving first-pass functionality and target coverage metrics for multiple silicon iterations.

Business Context

A Tier-1 semiconductor customer developing an IoT gateway device needed rigorous verification of multiple Cortex-M3 based chips that convert radio packets into IP packets. The project required detailed SystemVerilog/UVM verification, block- and SoC-level test planning, and coverage analysis across key interfaces (cache, memory, USB, Ethernet, SPI/I2C) to mitigate risk and ensure tape-out success within aggressive timelines.

Solutions

Neurealm executed a structured digital verification flow using SystemVerilog, UVM, and V-Planner for test planning and stimulus generation. They developed comprehensive test plans and test cases, performed block- and SoC-level verification, and met coverage goals, resulting in two IC tape-outs with functional first-pass silicon.